LMK02000 - Precision Clock Distributor with Integrated PLL

	LMK02000 - Precision Clock Distributor with Integrated PLL from the PowerWise® Family

Datasheet	Packaging	Samples & Pricing	Eval. Boards	Design Tools	Reference Designs	Knowledge Base

Features

•	20 fs additive jitter
•	Integrated Integer-N PLL with outstanding normalized phase noise contribution of -224 dBc/Hz
•	Clock output frequency range of 1 to 800 MHz
•	3 LVDS and 5 LVPECL clock outputs
•	Dedicated divider and delay blocks on each clock output
•	Pin compatible family of clocking devices
•	3.15 to 3.45 V operation
•	Package: 48 pin LLP (7.0 x 7.0 x 0.8 mm)

General Description

The LMK02000 precision clock conditioner combines the functions of jitter cleaning/reconditioning, multiplication, and distribution of a reference clock. More...

Typical Application

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Typical Application

Parametric Table expand

Parametric Table collapse

Max Output Clock Freq 1080 MHz

Min VCO Freq Undefined MHz

Max VCO Freq Undefined MHz

PLL Type PLL only

RMS Jitter 0.2 ps

LVDS Outputs 3

LVPECL Outputs 5

LVCMOS Outputs 0

Max Output Clock Freq 1080 MHz

Min VCO Freq Undefined MHz

Max VCO Freq Undefined MHz

PLL Type PLL only

RMS Jitter 0.2 ps

LVDS Outputs 3

LVPECL Outputs 5

LVCMOS Outputs 0

Min Supply Voltage 3.15 Volt

Max Supply Voltage 3.45 Volt

Temperature Min -40 deg C

Temperature Max 85 deg C

Power Consumption 1.125 Watt

PowerWise Rating 6 28.125 mW x ps /ch

PowerWise Yes

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Typical Performance

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Also Recommended

LMK01000	1.6 GHz Low-Noise Clock Distributor (LVPECL/LVDS Outputs)
LMK02002	Clock Jitter Cleaner With External VCXO (LVPECL Outputs)
LMK03000C	Clock Jitter Cleaner With Integrated 1.2 GHz VCO (LVPECL/LVDS Outputs)
LMK03001C	Clock Jitter Cleaner With Integrated 1.5 GHz VCO (LVPECL/LVDS Outputs)
LMK03002C	Clock Jitter Cleaner With Integrated 1.7 GHz VCO (LVPECL Outputs)
LMK03033C	Clock Jitter Cleaner With Integrated 2.0 GHz VCO (LVPECL/LVDS Outputs)
LMK04031B	Clock Jitter Cleaner With Cascaded PLLs And Integrated 1.5 GHz VCO (LVPECL/LVDS/LVCMOS Outputs)
LMK04033B	Clock Jitter Cleaner With Cascaded PLLs And Integrated 2.0 GHz VCO (LVPECL/LVDS/LVCMOS Outputs)
LMK04000B	Clock Jitter Cleaner With Cascaded PLLs And Integrated 1.2 GHz VCO (LVPECL/LVCMOS Outputs)

Additional Resources

Design Tools (see below)

Block Diagram

*click for larger image

Datasheet

RoHS Compliance Information	Size in Kbytes	Date
LMK02000 Precision Clock Conditioner with Integrated PLL	453 Kbytes	4-Sep-07	View Online Download
LMK02000 Precision Clock Conditioner with Integrated PLL (Japanese)	648 Kbytes

If you have trouble printing or viewing PDF file(s), see Printing Problems.

Package Availability, Models, Samples & Pricing

Part Number

Package

Factory Lead Time

Models

Samples &
Electronic
Orders

Budgetary Pricing

Std
Pack
Size

Package
Marking
Format

Type

Pins

Spec.

MSL
Rating

Peak
Reflow

RoHS
Report

CAD
Symbols

Weeks

Qty

$US each

LMK02000EVAL-1

LMK02000 Evaluation board with 245.76 VCXO

Full production

N/A

$290.00

N/A

LMK02000EVAL-2

LMK02000 Evaluation board without VCXO

Full production

N/A

$260.00

N/A

LMK02000ISQ

LLP

NOPB

260

RoHS

Download

Full production

N/A

1K+

$10.00

reel
of
250

NS
UZXYTT
K02000 I

12 weeks

N/A

LMK02000ISQX

LLP

NOPB

260

RoHS

Download

Full production

N/A

1K+

$10.00

reel
of
2500

NS
UZXYTT
K02000 I

12 weeks

N/A

General Description

The LMK02000 precision clock conditioner combines the functions of jitter cleaning/reconditioning, multiplication, and distribution of a reference clock. The device integrates a high performance Integer-N Phase Locked Loop (PLL), three LVDS, and five LVPECL clock output distribution blocks.

Each clock distribution block includes a programmable divider, a phase synchronization circuit, a programmable delay, a clock output mux, and an LVDS or LVPECL output buffer. This allows multiple integer-related and phase-adjusted copies of the reference to be distributed to eight system components.

The clock conditioner comes in a 48-pin LLP package and is footprint compatible with other clocking devices in the same family.

Design Tools

Title	Size in Kbytes	Date
More design resources for the LMK clock conditoners	19 Kbytes	2-Jun-2008	View

If you have trouble printing or viewing PDF file(s), see Printing Problems.

Reference Designs

•	RD-147 - Low IF Receiver Reference Design Board

Application Notes

Title	Size in Kbytes	Date
AN-1821: Application Note 1821 CPRI Repeater System	1497 Kbytes	15-May-08	Download
AN-1734: Application Note 1734 Using the LMK03000C to Clean Recovered Clocks	188 Kbytes	2-May-08	Download
AN-1734 (Chinese): Application Note 1734 Using the LMK03000C to Clean Recovered Clocks	338 Kbytes
AN-1865: Application Note 1865 Frequency Synthesis and Planning for PLL Architectures	147 Kbytes	2-Jul-08	Download

If you have trouble printing or viewing PDF file(s), see Printing Problems.

[Information as of 7-Jan-2009]