Datasheet
Package Availability, Models, Samples & Pricing
General Description
The
LMK02002 precision clock conditioner combines the functions of jitter cleaning/reconditioning, multiplication, and distribution of
a reference clock. The device integrates a high performance Integer-N Phase Locked Loop (PLL), and four LVPECL clock output
distribution blocks.
Each clock distribution block includes a programmable divider, a phase synchronization circuit, a programmable delay, a clock
output mux, and an LVPECL output buffer. This allows multiple integer-related and phase-adjusted copies of the reference
to be distributed to eight system components.
The clock conditioner comes in a 48-pin LLP package and is footprint compatible with other clocking devices in the same family.
Design Tools
| Title | Size in Kbytes |
Date |
 |
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| More design resources for the LMK clock conditoners |
19 Kbytes |
2-Jun-2008 |
View |
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Application Notes
| Title | Size in Kbytes |
Date |
 |
| AN-1821: Application Note 1821 CPRI Repeater System |
1497 Kbytes |
15-May-08 |
Download |
More Application Notes
| Title | Size in Kbytes |
Date |
 |
| AN-1865: Application Note 1865 Frequency Synthesis and Planning for PLL Architectures |
147 Kbytes |
2-Jul-08 |
Download |
| AN-1734: Application Note 1734 Using the LMK03000C to Clean Recovered Clocks |
188 Kbytes |
2-May-08 |
Download |
AN-1734 (Chinese): Application Note 1734 Using the LMK03000C to Clean Recovered Clocks
|
338 Kbytes |
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[Information as of 7-Jan-2009]
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